Why I am not able to find ACK and NACK signals in Intel FPGA Avalon I2C (Master) Core ? - Why I am not able to find ACK and NACK signals in Intel FPGA Avalon I2C (Master) Core ? Description In the I2C Standard protocol, there must be acknowledgement(ACK) and Not acknowledgement(NACK) signals that are sent between Master and Slave. However, these signals cannot be find in Intel FPGA I2C (Master) Core. Resolution The ACK and NACK is handled by the controller itself, the developer should not pay attention to these signals. In case of master write to slave, you can refer to NACK_DET interrupt in table 94 page 123: https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_embedded_ip.pdf An updated information will be added to the Embedded Peripherals IP User Guide in future releases. Custom Fields values: ['novalue'] Troubleshooting 558824 False ['Avalon I2C (Master) IP', 'Nios® II Processor'] ['novalue'] novalue novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']