Audio Clock Contains High Jitter - Audio Clock Contains High Jitter
Description The audio clock, aud_clk_out , generated by the SDI Audio Extract MegaCore function contains high jitter. The SDI Audio Extract MegaCore function generates aud_clk_out at a frequency of 3.072 MHz, that is synchronous to the receiving video data, but contains high jitter. This issue affects all SDI Audio Extract configurations. The generated audio signal contains high jitter. Resolution None. The user is responsible to generate a clean and synchronous frequency of 3.072 MHz.
Custom Fields values:
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Troubleshooting
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True
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['FPGA Dev Tools Quartus II Software']
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10.1
['Programmable Logic Devices']
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['novalue']
['novalue'] - 2021-08-25
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