To save power when the transceiver channels are not in used, can I keep the transceiver channels in the Stratix®10 L- or H-Tile design in reset ? - To save power when the transceiver channels are not in used, can I keep the transceiver channels in the Stratix®10 L- or H-Tile design in reset ? Description No. Keeping the transceiver channels in analog reset for a long interval will cause performance degradation. Resolution There is currently no plan to fix this problem. Custom Fields values: ['novalue'] Troubleshooting 14010227986 True ['L-Tile H-Tile Transceiver Native PHY Stratix® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] No plan to fix 19.3 ['Stratix® 10 GX FPGA', 'Stratix® 10 MX FPGA', 'Stratix® 10 SX FPGA', 'Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue'] - 2024-11-21

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