Why is the input parallel termination value not shown in the Intel® Quartus® Prime fitter report for Input Pins and Bidirectional Pins? - Why is the input parallel termination value not shown in the Intel® Quartus® Prime fitter report for Input Pins and Bidirectional Pins? Description Starting in the Intel® Quartus® Prime Pro Edition software version 19.3, input terminations using parallel OCT are reported in the Intel Quartus Prime Fitter > Plan Stage > Input Pins or Bidir Pins as Input Termination = ON. Previous Intel Quartus Prime Pro Edition software versions reported parallel OCT with the termination value. An example is Parallel 60 Ohm with Calibration. There is no workaround required as this is only a reporting issue. The parallel termination value is correctly set in the compiled project files with the value set in the Assignment Editor or in the case of EMIF IP as defined in the generated IP .qip file. Resolution This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 20.1. Custom Fields values: ['novalue'] Troubleshooting 18010523970 False ['External Memory Interfaces Arria® 10 FPGA IP', 'External Memory Interfaces Stratix® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.1 19.3 ['Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']