Arria V, Cyclone V, and Stratix V CPRI IP Core Autorate Negotiation Testbench Fails Simulation in the Synopsys VCS MX Simulator - Arria V, Cyclone V, and Stratix V CPRI IP Core Autorate Negotiation Testbench Fails Simulation in the Synopsys VCS MX Simulator Description CPRI IP core variations that target an Arria V, Cylcone V, or Stratix V device fail simulation with the autorate negotiation testbench in the Synopsys VCS MX simulator. Following PLL and channel reconfiguration, the IP core does not achieve link synchronization. Resolution This issue has no workaround. Run the autorate negotiation testbench using the Mentor Graphics ModelSim simulator or the Cadence NCSIM simulator. This issue will be fixed in a future version of the CPRI MegaCore function. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25