Why does scanclk disappear when enabling both Dynamic Phase Shifting and Dynamic Reconfiguration options in the Altera_PLL megafunction? - Why does scanclk disappear when enabling both Dynamic Phase Shifting and Dynamic Reconfiguration options in the Altera_PLL megafunction? Description The scanclk is not available when you have enabled both Dynamic Phase Shifting and Dynamic Reconfiguration options in the Altera_PLL megafunction. You can synchronize the Dynamic Phase Shift control signals to the mgmt_clk signal which is available as an input port on the Altera_PLL_RECONFIG block. Related Articles What is the supported frequency for scanclk and mgmt_clk for the Altera_PLL and Altera_PLL_RECONFIG megafunctions? Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V E FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25

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