Why are UnsupReq, NonFatalErr, and CorrErr statuses asserted after power cycle or OS reboot while using the P-Tile Intel® FPGA IP for PCI Express? - Why are UnsupReq, NonFatalErr, and CorrErr statuses asserted after power cycle or OS reboot while using the P-Tile Intel® FPGA IP for PCI Express? Description You may find UnsupReq , NonFatalErr , and CorrErr status asserted after power cycle or operating system (OS) reboot when using the P-Tile Intel® FPGA IP for PCI Express. Resolution According to the PCI Express Base specification revision 4.0 version 1.0, during the enumeration of a non-existent device or function, completion with UR status is sent, and UnsupReq is asserted. Meanwhile, Non-Fatal Advisory Error is determined, and CorrErr and NonFatalErr are asserted. To work around this problem, clear the UnsupReq , NonFatalErr , and CorrErr statuses in the PCI Express configuration space registers before checking them during data transactions. This problem is not planned to be fixed in a future version of the Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 00658543 False ['Interfaces'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 21.4 ['Agilex™ 7 FPGA F-Series', 'Stratix® 10 DX FPGA'] ['novalue'] ['novalue'] ['novalue'] - 2023-01-08