Can I choose the DCLK frequency for slave devices when using a multiple device Active Serial (AS) configuration scheme in 28nm devices? - Can I choose the DCLK frequency for slave devices when using a multiple device Active Serial (AS) configuration scheme in 28nm devices? Description No, when using a multiple device AS configuration scheme in Stratix® V, Arria® V, and Cyclone® V devices, a 12.5 MHz clock is always used for DCLK of the slave devices, while you can choose a 12.5, 25, 50, or 100 MHz clock for the DCLK of the master device. Resolution When using a multiple device AS configuration scheme in Stratix® V, Arria® V, and Cyclone® V devices, a 12.5 MHz clock is always used for the DCLK of the slave devices. Custom Fields values: ['novalue'] Troubleshooting 2205829562 False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Cyclone® V E FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']