Agilex 7 HBM2E burst length - Agilex 7 HBM2E burst length I noticed that I can use a burst length of 1 (arlen/awlen = 0). But the datasheet says "In BL8 mode, the HBMC supports only a burst length of 2 for write and read transactions. If you issue a burst length of 1 in BL8 mode, you will see bresp="10"(SLVERR).". Is the datasheet outdated (for version 25.1.1, didn't find one for 25.3.1 which I'm currently using), or is this undocumented and I shouldn't do this? Would make programming easier, if also burst length 1 is supported. Replies: Re: Agilex 7 HBM2E burst length Thanks, this makes sense then to recommend it. Replies: Re: Agilex 7 HBM2E burst length Hi FBuss2 , HBM2E operates with fixed internal burst lengths (BL4/BL8). In BL8 mode, each internal column access returns a full BL8 worth of data. A 1‑beat AXI write on a narrow port often forces read‑modify‑write internally; a 1‑beat read fetches a full internal BL8 but delivers only one byte on AXI. This is highly inefficient and can degrade throughput and increase power. Regards, Adzim Replies: Re: Agilex 7 HBM2E burst length Thanks for the information. If you say "can still run" what does this mean, why do you recommend then to use a burst length 2, if it works? Are there any disadvantages, undefined behavior or anything else if I use burst length 1? Replies: Re: Agilex 7 HBM2E burst length Hi FBuss2 , AXSIZE = 110 is a 64 bytes transfer but the HBM setting is used only 256 bit. Maybe you can use AXSIZE = 101 for 32 bytes transfer. I think the burst length = 1 can still run the test but our recommendation is to use burst length at least 2 if BL8 or fabric NOC is enabled. Regards, Adzim Replies: Re: Agilex 7 HBM2E burst length These are the settings: AWLEN / ARLEN = "00" AWSIZE / ARSIZE = "110" AWBURST / ARBURST = "01" AWPROT = "010" Here is an example running on the FPGA. I don't have SignalTap, so I wrote my own logger for it. Some cycles later the HBM signals back the bvalid, and I can also read it back successfully with 1 burst (arlen=0). Attached is the full waveform file, including the read. Replies: Re: Agilex 7 HBM2E burst length Hi FBuss2 , When running the test, what is the AXSIZE and AXLEN you used? Could be possible the test has cross 4KB boundary. Regards, Adzim Replies: Re: Agilex 7 HBM2E burst length Here are all the IP configurations of the project: https://frank-buss.de/tmp/ip.zip Mostly default settings for the HBM2E IP, just BL8 enabled. I'm using the IA-860m PCIe card, with my own design, based on the card vendor cardtest example. Quartus version is 25.3.1, with patch 1.02 installed. Replies: Re: Agilex 7 HBM2E burst length Hi FBuss2 , Sorry for the delay to reply. I was OOO last week and not able to reply on time. Can you provide the HBM2E IP setting that you configured? Are you testing on a Agilex 7 M devkit or a custom board? Did you used example design to run the test or used your own design? Regards, Adzim Replies: Re: Agilex 7 HBM2E burst length And a related question: what is the max burst length? The port is 8 bits wide, but it doesn't work if I use a length greater than 64 in BL8 mode.