Software Flow for Agilex™ 5 and Agilex 3 SoC FPGA - 34 Minutes This online training provides an introduction to the Agilex™ 5 and Agilex 3 SoC FPGA software development flow and options for booting. The Agilex 5 and Agilex 3 SoC FPGA design flow is divided into a hardware project and then software development of the First and Second Stage bootloaders and subsequent stages all the way to the user application. The description of the booting options will also provide options for you to chose the embedded OS for your application. Course Objectives At course completion, you will be able to: Describe the flow and tools for software development for Agilex 5 and Agilex 3 SoC FPGAs. Understand the booting stages and tools needed to implement an OS in Agilex 5 and Agilex 3 SoC FPGAs. Skills Required : Introductory level of Quartus Prime Software and Platform Designer Background in digital logic design Basic programming skills. Linux OS environment use, as well as command line interface. If the audio for the course does not start automatically, press pause and then play on the course player. The transcript of the course audio is available in the Notes or closed captioning (CC) feature of the player. If you need assistance with this course, please email fpgatraining@altera.com . Reference Course Code: FPGA_OSWA5. FPGA_OSWA5. <p>Software Flow for Agilex 5 SoC FPGA</p>