Why is the Run Driver Margins option unavailable in the EMIF Debug Toolkit when targeting the Intel Agilex® 7 FPGA devices? - Why is the Run Driver Margins option unavailable in the EMIF Debug Toolkit when targeting the Intel Agilex® 7 FPGA devices? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 20.3 and earlier, you may see that the “Run Driver Margins” option is unavailable in the EMIF Debug Toolkit. Resolution Follow the guidelines in the "Enabling the EMIF Toolkit in an Existing Design" section in the External Memory Interfaces Intel® Agilex® FPGA IP User Guide . In addition, when connecting the Calibration IP and the EMIF IP in Platform Designer, click the emif_calbus in the Calibration IP first and then connect it to the emif_calbus in the EMIF IP. This is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 20.4. Custom Fields values: ['novalue'] Troubleshooting 14012730163 False ['External Memory Interfaces Debug Component IP', 'Memory Interfaces and Controllers'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.4 20.2 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']