Metastability Reports Erroneously Show Autogenerated Registers as the Heads of Synchronizer Chains - Metastability Reports Erroneously Show Autogenerated Registers as the Heads of Synchronizer Chains
Description The Quartus ® Prime Standard Edition software and the Quartus Prime Pro Edition software automatically generate registers with no synchronous input and then add them to timing graphs on clock buffer paths to model Fmax limits. These registers erroneously appear in the metastability reports as the heads of synchronizer chains. Resolution You may ignore these autogenerated registers in the metastability reports.
Custom Fields values:
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Troubleshooting
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True
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['FPGA Dev Tools Quartus® Prime Software Pro', 'FPGA Dev Tools Quartus® Prime Software Standard']
16.0.1
16.0
['Programmable Logic Devices']
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['novalue'] - 2021-08-25
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