Stratix V Hard IP for PCI Express IP Core Does Not Perform Optional Address Translation Check - Stratix V Hard IP for PCI Express IP Core Does Not Perform Optional Address Translation Check Description The PCI Express Base Specification states that receivers can optionally check the Address Translation (AT) bits of the Transaction Layer Packet (TLP) and flag the received TLP as malformed if AT is not 2’b00. The Stratix V Hard IP for PCI Express does not perform this check. Resolution No workaround is required; however, you cannot rely on the AT bits to flag malformed TLPs. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 11.0.1 ['Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']