Why am I still getting a Critical Warning about Simultaneous Switching Noise (SSN) and crosstalk even though I am following the SSN and crosstalk reduction guidelines? - Why am I still getting a Critical Warning about Simultaneous Switching Noise (SSN) and crosstalk even though I am following the SSN and crosstalk reduction guidelines? Description Due to a problem in the Quartus® II software version 13.1 you may see the critical warning shown below, even though you have followed the Knowledge Base solution ID: rd10102013_979 Critical Warning (12888): Cross talk of LVDS Pin <design_pin_name> from SE I/O is too high. Reassign or move one or more of the following SE I/Os pins location and re-run the analysis again. Please refer to the guideline from the Knowledge Base solution ID: rd10102013_979 and ensure the total % of crosstalk for the following SE I/O pins does not exceed 100% . This error may incorrectly appear under these conditions: - When using a single ended IO standard other than 2.5V within the same or across different I/O banks with LVDS pins. - When using 2.5V single ended IO across different I/O bank with LVDS pins. Resolution If you have identified that a warning is invalid, you can temporarily disable the critical warning by adding the following line in your .qsf file. set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to <design_pin_name> This problem will be fixed in future release of the Quartus II software. Related Articles How do I reduce the percentage of crosstalk and SSN towards differential pins in Cyclone V devices? Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 13.1 ['Cyclone® V E FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA'] ['novalue'] ['novalue'] ['novalue']