Why is the rx_am_lock port in the 25G Ethernet Intel® FPGA IP always low when the channel is reconfigured to 10G? - Why is the rx_am_lock port in the 25G Ethernet Intel® FPGA IP always low when the channel is reconfigured to 10G? Description Due to the different architecture between 10G and 25G mode in the 25G Ethernet Intel® FPGA IP, after the channel has been reconfigured to 10G, the port rx_am_lock does not behave the same as when the IP is operating in 25G mode. rx_am_lock will output constant 0 when the channel switches from 25G to 10G mode. Resolution This problem is not scheduled to be fixed. Custom Fields values: ['novalue'] Troubleshooting 1508019250 False ['25G 50G Ethernet', '25G Ethernet IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue 19.1 ['Stratix® 10 GX FPGA', 'Stratix® 10 MX FPGA', 'Stratix® 10 SX FPGA', 'Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue']