Does the Clock Video Input II (4K Ready) support resolutions higher then 2600 pixels? - Does the Clock Video Input II (4K Ready) support resolutions higher then 2600 pixels? Description Due to a problem in the Quartus® II software version 14.0, you may get the following errors when generating Clock Video Input II (4K Ready) with pixel width or height greater then 2600. Error: alt_vip_cl_cvi_0: "Width" (H_ACTIVE_PIXELS_F0) <number of pixels> is out of range: 32-2600 Error: alt_vip_cl_cvi_0: "Height - frame/field 0" (V_ACTIVE_LINES_F0) <number of pixels> is out of range: 32-2600 Resolution To work around this problem, do the following: - Go to folder <Quartus install dir>\ip\altera\vip\ip_library\full_ip\cl_cvi - Open file alt_vip_cl_cvi_hw.tcl - Search for parameter H_ACTIVE_PIXELS_F0 and change its range to up to 4096 with following modifications: Old line: set_parameter_property H_ACTIVE_PIXELS_F0 ALLOWED_RANGES 32:2600 New line set_parameter_property H_ACTIVE_PIXELS_F0 ALLOWED_RANGES 32:4096 - Apply same range extention to V_ACTIVE_LINES_F0 Old line: set_parameter_property V_ACTIVE_LINES_F0 ALLOWED_RANGES 32:2600 New line set_parameter_property V_ACTIVE_LINES_F0 ALLOWED_RANGES 32:4096 - Close and reopen Qsys Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 14.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']