Why does the Intel® Arria® 10 DDR4 IP not correct an ECC error? - Why does the Intel® Arria® 10 DDR4 IP not correct an ECC error? Resolution A correctable bit error will not be corrected in the Intel® Arria® 10 DDR4 IP when a data mask does not correspond to a full byte (for example, a 4-bit data mask). This is because the ECC logic can only support read-modify-write on a byte-wide basis. Custom Fields values: ['novalue'] Troubleshooting 1508179706 False ['External Memory Interfaces Arria® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.2 20.2 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25

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