Why is my set_clock_uncertainty -hold constraint ignored by the TimeQuest timing analyzer? - Why is my set_clock_uncertainty -hold constraint ignored by the TimeQuest timing analyzer? Description In the TimeQuest timing analyzer, if the hold check is performed on the same physical clock edge then user-defined clock uncertainty applied with the set_clock_uncertainty -hold is ignored. Resolution In the Quartus® II software version 11.1 SP1 and later, the set_clock_uncertainty constraint includes the option -enable_same_physical_edge that will force the TimeQuest timing analyzer to honor this hold uncertainty. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] 11.1.1 novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25