Why can't I use the x1 line to clock Arria® V device transceiver channels higher than 6.5536 Gbps within a transceiver bank but across a triplet boundary when using Quartus® II software version 15.0.1 and earlier? - Why can't I use the x1 line to clock Arria® V device transceiver channels higher than 6.5536 Gbps within a transceiver bank but across a triplet boundary when using Quartus® II software version 15.0.1 and earlier? Description Due to a bug in Quartus® II software version 15.0 Update 1 and earlier, the Fitter will prevent you from clocking Arria® V device transceiver channels higher than 6.5536 Gbps within a transceiver bank but across a triplet boundary. Resolution To work around this problem, install the Quartus® II software version 15.0 Update 1 and then download and install patch 1.07 from the links below. Download the Quartus II software version 15.0 Update 1 patch 1.07 for Windows (.exe) Download the Quartus II software version 15.0 Update 1 patch 1.07 for Linux (.run) Download the Readme file for the Quartus II software version 15.0 Update 1 patch 1.07 (.txt) This problem has already been fixed in Quartus® standard software version 16.1. Custom Fields values: ['novalue'] Troubleshooting 307426 False ['Arria® V Transceiver Native PHY IP'] ['FPGA Dev Tools Quartus II Software'] 16.1 15.0.1 ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA'] ['novalue'] ['novalue'] ['novalue']