Why does the EDA Simulation Library Compiler fail to compile the tenm_hssi_ver and tennm_hssi_f0_ver libraries? - Why does the EDA Simulation Library Compiler fail to compile the tenm_hssi_ver and tennm_hssi_f0_ver libraries? Description In the Intel® Quartus® Prime Pro Edition Software, you may see that these libraries fail to compile in the EDA Simulation Library Compiler. This problem occurs when tile-based IPs are generated in Platform Designer. Resolution To avoid this problem, map all logical libraries named tennm_hssi_<X>_ver where <X> could be a two-letter string, such as f0, to logical library tennm_hssi_all_ver. This mapping can be done using vmap command. For example, the library compiler compiled the library tennm_hssi_all_ver into directory /libraries/tennm_hssi_all_ver. Run command "vmap tennm_hssi_f1_ver /libraries/tennm_hssi_all_ver" Custom Fields values: ['novalue'] Troubleshooting 18018735739 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] No plan to fix 21.3 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']