PTP Hybrid Clock (IEEE1588 – Precision Time Protocol) - Full standalone hardware only solution of a PTP Hybrid Clock (Combined PTP TC and OC) NetTimeLogic is your partner for synchronization, network redundancy and time sensitive networking solutions in the field of embedded systems since 2015. With our expertise in all kinds of… Arria® 10 SX FPGA Cyclone® IV GX FPGA Agilex™ 5 FPGA E-Series MAX® 10 FPGA Cyclone® V SX FPGA Arria® V GZ FPGA Agilex™ 9 FPGA Direct RF-Series Agilex™ 7 FPGA I-Series Arria® V SX FPGA Stratix® 10 DX FPGA Stratix® 10 SX FPGA Agilex™ 7 FPGA M-Series Cyclone® V GT FPGA Arria® 10 GT FPGA Arria® V ST FPGA Arria® 10 GX FPGA Stratix® 10 TX FPGA Cyclone® V SE FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Arria® V GX FPGA Cyclone® V E FPGA Agilex™ 3 FPGA C-Series Cyclone® V GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Cyclone® V ST FPGA Agilex™ 5 FPGA D-Series Stratix® 10 GX FPGA Arria® V GT FPGA Cyclone® 10 LP FPGA Agilex™ 7 FPGA F-Series Cyclone® 10 GX FPGA Cyclone® IV E FPGA Stratix® 10 AX FPGA The PTP Hybrid Clock (HC) from NetTimeLogic is a combination of NetTimeLogic's PTP Transparent Clock (TC) and PTP Ordinary Clock (OC) according to IEEE1588-2019 (PTP). It is intended mainly for daisy-chain applications but can also wrap other non-deterministic Ethernet cores/devices like Bridges, Switches, or Redundancy Nodes, and runs the whole protocol handling, algorithms, and calculations are implemented in the core, no CPU is required, which allows running PTP synchronization completely independent and standalone. The HC can run again as Master or Slave with E2E or P2P as delay mechanism and supports the following PTP Profiles: Default Profile, Power Profile, Utility Profile, TSN Profile (802.1AS) and ITU Profiles (ITU-T-G82651/G82751/G82752) Access Aerospace Broadcast Data Center Cloud (Public, Private, Hybrid) Defense Government Test Transportation Wireless PTP Hybrid Clock (IEEE1588 – Precision Time Protocol) Key Features Combined PTP Ordinary Clock and PTP Transparent Clock according to IEEE1588-2019/2008 Offering Brief No Yes No Yes VHDL Arria® 10 SX FPGA Cyclone® IV GX FPGA Agilex™ 5 FPGA E-Series MAX® 10 FPGA Cyclone® V SX FPGA Arria® V GZ FPGA Agilex™ 9 FPGA Direct RF-Series Agilex™ 7 FPGA I-Series Arria® V SX FPGA Stratix® 10 DX FPGA Stratix® 10 SX FPGA Agilex™ 7 FPGA M-Series Cyclone® V GT FPGA Arria® 10 GT FPGA Arria® V ST FPGA Arria® 10 GX FPGA Stratix® 10 TX FPGA Cyclone® V SE FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Arria® V GX FPGA Cyclone® V E FPGA Agilex™ 3 FPGA C-Series Cyclone® V GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Cyclone® V ST FPGA Agilex™ 5 FPGA D-Series Stratix® 10 GX FPGA Arria® V GT FPGA Cyclone® 10 LP FPGA Agilex™ 7 FPGA F-Series Cyclone® 10 GX FPGA Cyclone® IV E FPGA Stratix® 10 AX FPGA Yes Yes ISPCS, IIC 25.1.0 Offering Brief Production Not required a1JUi0000049UKeMAM What's Included Source Code Ordering Information NTL_PTP_HC a1JUi0000049UKeMAM Production Acceleration / AI / Cloud Intellectual Property (IP) a1MUi00000BO8snMAD a1MUi00000BO8snMAD Select 2026-04-21T12:58:32.000+0000 Full standalone hardware only solution of a PTP Hybrid Clock (Combined PTP TC and OC) Partner Solutions