Which I/O standards support the VCCIO_XX VREF_MODE (Internal VREF) assignment when using Stratix® 10 devices? - Which I/O standards support the VCCIO_XX VREF_MODE (Internal VREF) assignment when using Stratix® 10 devices? Description For Stratix® 10 devices, POD-12, SSTL-12, HSTL-12 Class I and Class II are I/O standards that support internal VREF. However, the internal VREF is only available for External Memory Interface (EMIF) use cases. Resolution Different applications or protocols will have different options of I/O standards available that support Internal VREF. More information about this can be found in the External Memory Interfaces Stratix® 10 FPGA IP User Guide. Custom Fields values: ['novalue'] Troubleshooting 14016779485 False ['External Memory Interfaces (EMIF) IP'] ['FPGA Dev Tools Quartus® Prime Software'] 22.4 21.3 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']