HyperBus Controller (Silicon Proven IP for Altera Devices) - Mobiveil’s HyperBus Controller enables high-speed (up to 333 MB/s) flash access over a 12-pin interface, surpassing legacy SPI/QSPI protocols. It supports AXI interface, 0-wait-state writes,… Mobiveil, Inc.(a GlobalLogic company) is a fast-growing technology company headquartered in Santa Clara, California, specializing in Silicon Intellectual Properties (SIP), application platforms, and… Arria® II GX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST SoC FPGA Arria® V SX SoC FPGA Cyclone® III FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE SoC FPGA Cyclone® V ST SoC FPGA Cyclone® V SX SoC FPGA Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series Intel® Arria® 10 GT FPGA Intel® Arria® 10 GX FPGA Intel® Arria® 10 SX SoC FPGA Intel® Cyclone® 10 GX FPGA Intel® Cyclone® 10 LP FPGA Intel® MAX® 10 FPGA Intel® Stratix® 10 AX SoC FPGA Intel® Stratix® 10 DX FPGA Intel® Stratix® 10 GX FPGA Intel® Stratix® 10 SX SoC FPGA Intel® Stratix® 10 TX FPGA Intel® eASIC™ N3X Devices Intel® eASIC™ N3XS Devices Stratix® III FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Configurable HyperBus Flash Memory Controller for HyperFlash/HyperRAM, delivering continuous-burst reads, 0-wait-state write bursts (AXI up to 256 words), AXI-lite control, and device clocks up to 166 MHz for high throughput with a 12-pin low-pin-count interface. Mobiveil’s HyperBus controller is technology-independent, system-validated RTL that interfaces to Spansion/Infineon-style HyperBus devices. It supports true continuous-burst read for HyperFlash, minimum inter-read gaps to maximize read performance, cache-line XiP fetches, 0-wait-state write bursts on the AXI side, and up to 16 outstanding addresses. Deliverables include configurable RTL, HDL testbench, protocol checkers, bus watchers, performance monitors, and design/verification guides. ASIC Proto Consumer Data Center Cloud (Public, Private, Hybrid) Industrial Transportation Wireless HyperBus Controller (Silicon Proven IP for Altera Devices) Key Features Compatible with spansion hyperbus based memory products Offering Brief No Yes No No Encrypted Verilog Verilog Arria® II GX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST SoC FPGA Arria® V SX SoC FPGA Cyclone® III FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE SoC FPGA Cyclone® V ST SoC FPGA Cyclone® V SX SoC FPGA Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series Intel® Arria® 10 GT FPGA Intel® Arria® 10 GX FPGA Intel® Arria® 10 SX SoC FPGA Intel® Cyclone® 10 GX FPGA Intel® Cyclone® 10 LP FPGA Intel® MAX® 10 FPGA Intel® Stratix® 10 AX SoC FPGA Intel® Stratix® 10 DX FPGA Intel® Stratix® 10 GX FPGA Intel® Stratix® 10 SX SoC FPGA Intel® Stratix® 10 TX FPGA Intel® eASIC™ N3X Devices Intel® eASIC™ N3XS Devices Stratix® III FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Yes Yes 24.3.1 Offering Brief Production a1JUi0000049UJrMAM What's Included Configurable RTL Code Ordering Information NA Direct a1JUi0000049UJrMAM Production Intellectual Property (IP) a1MUi00000BO8shMAD a1MUi00000BO8shMAD Select 2025-10-24T15:52:58.000+0000 Mobiveil’s HyperBus Controller enables high-speed (up to 333 MB/s) flash access over a 12-pin interface, surpassing legacy SPI/QSPI protocols. It supports AXI interface, 0-wait-state writes, continuous burst reads, and XiP execution. Ideal for HyperFlash/HyperRAM integration, it maximizes throughput and performance in constrained systems. Partner Solutions