On-Chip Hot-Socketing & Power-Sequencing Support - Hot socketing is the capability to insert or remove a board into or out of a system during system operation without causing undesirable effects to the host system or the cards. Design Pages {"title":"On-Chip Hot-Socketing & Power-Sequencing Support"} Hot socketing refers to the capability to insert a board into or remove a board from a system during system operation without causing negative effects to the system or the board. It is also referred to as "hot swapping" or "hot plug-in". Altera offers on-chip hot-socketing and power-sequence-protection support and characterization proof data for 130-nm FPGA families. The Stratix®, Stratix GX, and Cyclone® FPGA families and the MAX® 7000AE, and MAX 3000A CPLD families are designed and tested to offer robust support for on-chip hot socketing and power-sequence protection without needing additional external devices or board manipulation. The 90-nm Stratix II and Cyclone II FPGA families and the 0.18-um MAX II CPLD family also support on-chip hot socketing and power-sequence-protection capability. To be considered a hot-socketable device, the device must meet three criteria: It can be driven before power-up without any damage It does not drive out before or during power-up External input signals to the device’s I/O pins do not power its VCCIO or VCCINT power supplies through the device’s internal paths To find out more about the advantages of the on-chip hot-socketing support in Altera FPGA devices, refer to the white paper Altera FPGA Hot-Socketing & Power-Sequencing Advantages that details Altera FPGA’s hot-socketing advantages. For detailed characterization data, refer to the white paper Hot-Socketing & Power-Sequencing Feature & Testing for Altera FPGA Devices . For detailed characterization data, refer to the white paper detailing hot-socketing features and testing for Stratix II, Cyclone II, Stratix, Stratix GX, and Cyclone FPGA families and MAX II, MAX 7000AE, and MAX 3000A CPLD families. Introduction Hot Socketing & Power-Sequence Protection in PLDs for High-Availability Systems Hot socketing is a critical requirement for systems that require high availability (constant system uptime), such as network storage servers or carrier-class telecommunication infrastructures, where each second of system downtime translates directly into revenue losses. Hot Socketing & Power-Sequence Protection in PLDs for Multi-Voltage Systems In multi-voltage systems for which hot socketing is not required, hot-socketing and power-sequence-protection capability of the PLDs still can be critical. In these systems, regulators are used to provide different voltage levels and can cause the power-up sequence to become unpredictable; devices that require a predetermined power-up sequence may no longer function properly. PLDs’ hot-socketing support can alleviate problems in multi-voltage system designs because normal PLD functionality will not be influenced by the system power-up sequence. This can be vital for the common application where CPLDs are used to control the power-up of other devices in very complex systems. Table 1 outlines some example systems in different market segments that benefit from hot socketing. Table 1. Examples of Systems Requiring Hot Socketing Market Segment Application Examples Networking Hubs Routers Switches Computing services Workstations Computer servers Data storage Data switches Tape automation system Storage system data centers Wireless communications Cellular base station infrastructure Wire line communications PBX and central office infrastructure On-Chip Hot Socketing & Power-Sequencing Support Advantages There are several techniques used to ensure that PLDs function properly during hot socketing, including sequence connectors and discrete hot-swap controllers. Table 2 compares hot socketing in Altera FPGA PLDs versus using other techniques. Table 2. Altera FPGA PLDs vs. the Alternatives Altera FPGA Hot-Socketable PLD (1) Sequenced Connectors Hot-Swap Controller Advantages Includes no-hassle, drop-in implementation Normal PLD functionality not influenced by power-up sequence (2) Includes on-chip support (no external devices or board manipulation required) (3) Guarantees that ground and power pins mate with the backplane before signal pins Includes in-rush current protection Includes power-up sequence control Disadvantages - May not work for multi-voltage systems Requires careful on-board power distribution Requires additional external device Uses more board space Contradicts with the pin-mating sequence requirements Requires additional investments May not guarantee hot-socketing capability of the PLD I/O buffers Notes: For the actual hot-socketing specification for each PLD family, refer to the handbook or data sheet of each respective family. The hot-socketing support in the Stratix, Stratix GX, and Cyclone FPGA families and the MAX 7000AE, and MAX 3000A CPLD families is verified against different power-up sequences. Detailed test set-up and procedures can be found in the characterization report . The Stratix II, Cyclone II, and MAX II families will also support hot-socketing feature. The APEX II, APEX 20K, ACEX® 1K, Mercury, FLEX® 10KA, FLEX 10KE, and 3.3-V FLEX 6000 FPGA families, and the MAX 7000B CPLD family also support hot socketing. See AN 107: Using Altera FPGA Devices in Multiple-Voltage Systems . Device Family Documents and Resources › Related Links