Why do reads from the reconfig_pdp interface of my F-Tile PMA/FEC Direct PHY Intel® FPGA IP or F-Tile PMA/FEC Direct PHY Multirate Intel® FPGA IP return 0x00000000? - Why do reads from the reconfig_pdp interface of my F-Tile PMA/FEC Direct PHY Intel® FPGA IP or F-Tile PMA/FEC Direct PHY Multirate Intel® FPGA IP return 0x00000000? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 23.2 and earlier, reading from the datapath Avalon® memory-mapped Interface (reconfig_pdp) may return 0x00000000 when the "readdatavalid" port is enabled on the datapath Avalon memory-mapped interface of your F-Tile PMA/FEC Direct PHY Intel FPGA IP or F-Tile PMA/FEC Direct PHY Multirate Intel FPGA IP design. Resolution This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition Software version 23.3. Custom Fields values: ['novalue'] Troubleshooting 16020785301 False ['F-Tile PMA/FEC Direct PHY IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.3 23.2 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']