Why is the on-die termination resistor for the Reference Clock pin of the Intel® Stratix® 10 E-tile device always disabled in the fitter report ? - Why is the on-die termination resistor for the Reference Clock pin of the Intel® Stratix® 10 E-tile device always disabled in the fitter report ? Description Due to a problem in the Intel® Quartus® Prime Pro Software version 19.2 and earlier, the on-die termination resistors are always disabled in the fitter report even if the assignment below is applied explicitly. set_instance_assignment -name HSSI_PARAMETER "refclk_divider_enable_termination=enable_term" -to <refclk_pin> Resolution There is no workaround. This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition software version 19.3. Custom Fields values: ['novalue'] Troubleshooting 1507514947 True ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.3 19.2 ['Stratix® 10 DX FPGA', 'Stratix® 10 MX FPGA', 'Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue']