What may cause the External Memory Interfaces Intel® Stratix® 10 FPGA IP to execute an additional refresh after a self-refresh exit? - What may cause the External Memory Interfaces Intel® Stratix® 10 FPGA IP to execute an additional refresh after a self-refresh exit? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 20.1, the External Memory Interfaces Intel® Stratix® 10 FPGA IP may execute an additional refresh after a self-refresh exit because both the controller refresh and the self-refresh are exercised. Resolution To work around this problem, turn ON the Enable User Refresh Control option. This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 20.2. Custom Fields values: ['novalue'] Troubleshooting 1408170524 False ['External Memory Interfaces Stratix® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.2 20.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']