Is there a problem with the settings of the clock frequency in the ALTLVDS_RX and ALTLVDS_TX megafunctions in the Quartus II software versions 10.1 and 10.1SP1? - Is there a problem with the settings of the clock frequency in the ALTLVDS_RX and ALTLVDS_TX megafunctions in the Quartus II software versions 10.1 and 10.1SP1? Description Yes, there is a problem with the setting of the input clock frequency in the ALTLVDS_RX and ALTLVDS_TX megafunctions in the Quartus® II software versions 10.1 and 10.1SP1 If the data rate is set to a fractional value then the derived input clock frequency only shows values as an integer. The PLL summary report will also not show the correct input clock frequency. A patch is available to fix this problem for the Quartus II software version 10.1. Download and install Patch 0.40 from the appropriate link below. Download the Quartus II software version 10.1 Patch 0.40 for Windows (.exe) Download the Quartus II software version 10.1 Patch 0.40 for Linux (.tar) Download the Readme for the Quartus II software version 10.1 Patch 0.40 (.txt) This problem is fixed in the Quartus II software versions 11.0 and newer. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Stratix® II FPGAs', 'Stratix® II GX FPGA', 'Stratix® III FPGAs'] ['novalue'] ['novalue'] ['novalue']