Why I can't assign unused VREF pin as IO pin in Cyclone® V GX FPGA device? - Why I can't assign unused VREF pin as IO pin in Cyclone® V GX FPGA device? Description You can't assign the unused VREF pins as user IO in Cyclone® V GX FPGA device. Please refer to Cyclone® V GX FPGA Pin Connection Guideline page 7: "If the VREF pins are not used, you should connect them to either the VCCIO in the bank in which the pin resides or GND." Resolution Please ignore the information found in Cyclone® V Device Handbook: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_5v1.pdf (P17) that mention "Unused voltage reference (VREF) pins that can be configured as user I/Os". Instead, you can refer to the updated handbook from this link: https://www.intel.com/content/www/us/en/docs/programmable/683375/current/logic-array-blocks-and-adaptive-logic-24877.html Related Articles https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_5v1.pdf https://www.intel.com/content/www/us/en/docs/programmable/683375/current/logic-array-blocks-and-adaptive-logic-24877.html Custom Fields values: ['novalue'] Troubleshooting https://hsdes.intel.com/appstore/article/#/1408023938 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 20.3 ['Cyclone® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']