Creonic Doppler Channel - The IP was developed to allow the performance evaluation of a low-earth orbit (LEO) digital communication system. Creonic is the ISO 9001:2015 certified leader in ready-for-use IP cores, offering a rich services and product portfolio for wired, wireless, fiber, and free-space optical communications. Covering… Intel® Arria® 10 SX SoC FPGA Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel® MAX® 10 FPGA Arria® V GZ FPGA Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series MAX® V CPLD Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Arria® V SX SoC FPGA Intel® Stratix® 10 DX FPGA Intel® Stratix® 10 SX SoC FPGA Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Cyclone® V GT FPGA Intel® Arria® 10 GT FPGA Arria® V ST SoC FPGA Intel® Arria® 10 GX FPGA Intel® Stratix® 10 TX FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Arria® V GX FPGA Cyclone® V E FPGA Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Cyclone® V GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel® Stratix® 10 GX FPGA Arria® V GT FPGA Intel® Cyclone® 10 LP FPGA Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel® Cyclone® 10 GX FPGA Intel® Stratix® 10 AX SoC FPGA Stratix® III FPGA The Creonic Doppler Channel IP is a Doppler shift frequency (DSF) generator capable of introducing a shift frequency to samples as a phase offset. The IP was developed to allow the performance evaluation of a low-earth orbit (LEO) digital communication system. Unlike a software-based DSF generator, which might take several hours and even days to accomplish the stated purpose, a hardware-based DSF generator requires significantly less time. Runtime is reduced by several orders of magnitude. Aerospace Wireless Creonic Doppler Channel Key Features Support for orbital heights (h) in the range from 200 to 2000 km Offering Brief No No No No C/C++ Verilog VHDL Intel® Arria® 10 SX SoC FPGA Intel Agilex® 5 FPGAs and SoC FPGAs E-Series Intel® MAX® 10 FPGA Arria® V GZ FPGA Intel Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series MAX® V CPLD Intel Agilex® 7 FPGAs and SoC FPGAs I-Series Arria® V SX SoC FPGA Intel® Stratix® 10 DX FPGA Intel® Stratix® 10 SX SoC FPGA Intel Agilex® 7 FPGAs and SoC FPGAs M-Series Cyclone® V GT FPGA Intel® Arria® 10 GT FPGA Arria® V ST SoC FPGA Intel® Arria® 10 GX FPGA Intel® Stratix® 10 TX FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Arria® V GX FPGA Cyclone® V E FPGA Intel Agilex® 3 FPGAs and SoC FPGAs C-Series Cyclone® V GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Intel Agilex® 5 FPGAs and SoC FPGAs D-Series Intel® Stratix® 10 GX FPGA Arria® V GT FPGA Intel® Cyclone® 10 LP FPGA Intel Agilex® 7 FPGAs and SoC FPGAs F-Series Intel® Cyclone® 10 GX FPGA Intel® Stratix® 10 AX SoC FPGA Stratix® III FPGA No Yes 22.4.0 Offering Brief Production a1JUi0000049U8aMAE What's Included Deliverable includes Verilog source code or synthesized netlist, VHDL testbench, and bit-accurate Matlab, C or C++ simulation model Ordering Information Creonic Doppler Channel a1JUi0000049U8aMAE Production Intellectual Property (IP) Communication a1MUi00000BO8rZMAT a1MUi00000BO8rZMAT Select 2025-11-21T23:23:01.000+0000 The IP was developed to allow the performance evaluation of a low-earth orbit (LEO) digital communication system. Partner Solutions