Is the SDI II Sync Bit inserted correctly for ADF words in 6G 8 Streams or 12G 16 streams interleave? - Is the SDI II Sync Bit inserted correctly for ADF words in 6G 8 Streams or 12G 16 streams interleave? Description Due to a problem with the Intel® Serial Digital Interface (SDI) II IP core TX, sync bits are not correctly inserted into the ADF words when operating in 6G 8 streams (tx_std = 100) or 12G 16 streams interleave (tx_std = 110) mode. This typically impacts 6G SDI Mode 1 (2160-Line) videos. Therefore, the Intel SDI II RX IP core, or any receiver which is relying on the presence of the correct ADF words (000h, 3FFh, 3FFh) will not be able to correctly detect the ANC packet. Resolution This issue is fixed starting in Quartus® prime version v17.0. No work around is available for earlier releases. Custom Fields values: ['novalue'] Troubleshooting FB: 445283; True ['SDI II IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 17.0 16.1 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']