DDR Controller Designs in AFI Mode with Memory Burst Length of 2 Fail in Simulation - DDR Controller Designs in AFI Mode with Memory Burst Length of 2 Fail in Simulation Description Designs that use the full-rate DDR SDRAM high-performance controller in AFI mode with a memory burst length of 2 fail to simulate. This issue affects all designs that use DDR SDRAM high-performance controller in full-rate mode with a memory burst length of 2. As the generated memory model does not support memory burst length of 2, your design fails to simulate. Resolution Use a vendor memory model instead. This issue will not be fixed in a future version of the DDR SDRAM Controller with ALTMEMPHY IP. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 10.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']