How to set current strength for Agilex® 7 FPGA HPS dedicated IO? - How to set current strength for Agilex® 7 FPGA HPS dedicated IO? Description Due to a problem in Quartus® Prime Edition Software version 25.3.1 and prior, you may see the following error when you set current strength for HPS dedicated IO in qsf file or in assignment editor. Current strength logic option is set to 2/4/6/8mA for pin intel_agilex_hps_0_<IO_name>~pad， but setting is not supported by I/O standard 1.2-V. This problem occurs because HPS dedicated IOs in Agilex™ 7 device are configured to I/O standard 1.2-V by default in Quartus, instead of I/O standard 1.8-V. Resolution To work around this problem, please set the HPS IO to I/O standard 1.8-V in qsf file or in assignment editor, and then set current strength for the pins to make it work. Custom Fields values: ['novalue'] Troubleshooting QS-16184 novalue ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 26.1 25.3.1 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']