When compiling an Intel® Cyclone® 10 FPGA design, why do I see the following Internal Error: Sub-system: FDI_DATA, File: /quartus/ddb/fdi/fdi_timing_model.cpp, Line: 753 - When compiling an Intel® Cyclone® 10 FPGA design, why do I see the following Internal Error: Sub-system: FDI_DATA, File: /quartus/ddb/fdi/fdi_timing_model.cpp, Line: 753 Description Due to a problem with the Intel® Quartus® Prime Pro Edition Software v18.0, Intel® Cyclone® 10 GX FPGA designs might see the following Internal Error: Sub-system: FDI_DATA, File: /quartus/ddb/fdi/fdi_timing_model.cpp, Line: 753 during the fitter stage of compilation. This problem occurs when the Intel Cyclone 10 GX device family is installed without installing the Intel® Arria® 10 device family files. Resolution You are advised to install the Intel® FPGA Arria® 10 device family database file to work around this problem. This problem is fixed starting with Intel® Quartus® Prime Pro Edition Software version 19.1. Custom Fields values: ['novalue'] Troubleshooting 590811 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.1 18.0 ['Arria® 10 FPGAs and SoCs', 'Cyclone® 10 FPGAs', 'Cyclone® 10 GX FPGA'] ['novalue'] ['novalue'] ['novalue']