Why do all instances have the same settings when using two or more different configurations of the F-Tile Multi-Channel DMA Intel® FPGA IP for PCI Express*? - Why do all instances have the same settings when using two or more different configurations of the F-Tile Multi-Channel DMA Intel® FPGA IP for PCI Express*? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 23.1, you will see that all instances of the IP have the same settings after enumeration when using two or more different configurations of the F-Tile Multi-Channel DMA Intel® FPGA IP for PCI Express* in the design. Resolution The problem has been fixed starting in version 23.3 of the Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 15013435494 False ['Multi Channel DMA F-Tile for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 23.3 23.1 ['Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']