Is there an issue with Bus LVDS (BLVDS) in Arria II GX, Arria II GZ, Arria V, and Stratix V devices? - Is there an issue with Bus LVDS (BLVDS) in Arria II GX, Arria II GZ, Arria V, and Stratix V devices?
Description BLVDS will not work correctly in the Arria® II GX, Arria II GZ, Arria V, and Stratix® V device families if the BLVDS I/O standard is selected in the Quartus® II software. The negative leg will fail to toggle and could remain tri-stated or drive high. Resolution For pins that you intend to use as BLVDS, use the 2.5V Differential SSTL I/O standard in the Quartus II software for the Arria II GX, Arria II GZ, Arria V, and Stratix® V device families . The BLVDS I/O standard is removed in12.0 or later versions of the Quartus II software for projects that use these device families. For further information on using BLVDS in Altera® devices, refer to AN522: Implementing Bus LVDS Interface In Supported Altera Device Families (PDF) .
Custom Fields values:
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Troubleshooting
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False
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['FPGA Dev Tools Quartus II Software']
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10.0
['Arria® II GX FPGA', 'Arria® II GZ FPGA', 'Arria® V FPGAs and SoCs', 'Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Stratix® V E FPGA', 'Stratix® V FPGAs', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA']
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['novalue'] - 2021-08-25
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