Why does the Quartus® Prime Pro Edition software versions 24.2 and 24.3 fail when designing multi-rate ethernet IPs consisting of F-Tile FHT transceivers using 5 or 6 profiles? - Why does the Quartus® Prime Pro Edition software versions 24.2 and 24.3 fail when designing multi-rate ethernet IPs consisting of F-Tile FHT transceivers using 5 or 6 profiles? Description The lane mode reset and analog parameters are not properly updated after every iteration in the user flow. This leads to failure for designs with more than 5 profiles of F-Tile FHT transceivers, as the analog parameter values do not get updated, and the lane mode doesn’t change. Resolution The workaround is to fix the user flow so that the lane mode reset and analog parameters fixes are reflected in the Dynamic Reconfiguration controller. This problem is fixed by beginning with the Quartus® Prime Pro Edition Software version 24.3.1. Custom Fields values: ['novalue'] Troubleshooting 16025288495 False ['F-Tile PMA/FEC Direct PHY IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.3.1 24.2 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']