Why are UI and MEM_DQ_FREQ_PS set to tCK in *_ip_parameters.dat? - Why are UI and MEM_DQ_FREQ_PS set to tCK in *_ip_parameters.dat?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.1 and earlier, the value of UI and MEM_DQ_FREQ_PS are incorrectly set to tCK in the *_ip_parameters.dat file generated by External Memory Interfaces (EMIF) IP in designs targeting Agilex™ 7 FPGA F-Series and Agilex™ 7 FPGA I-Series devices. .param UI = 0.625 .param tCK = 0.625 .param MEM_DQ_FREQ_PS = 625.0 Resolution Use UI = 1/2 tCK when evaluating WR eye and RD eye. This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.
Custom Fields values:
['novalue']
Troubleshooting
22019839283
False
['External Memory Interfaces (EMIF) IP']
['FPGA Dev Tools Quartus® Prime Software Pro']
novalue
24.1
['Agilex™ 7 FPGA F-Series', 'Agilex™ 7 FPGA I-Series']
['novalue']
['novalue']
['novalue'] - 2024-04-09
external_document