How to analyse lock acquire and release using intel pin instrumentation - How to analyse lock acquire and release using intel pin instrumentation I am analyzing C++ codes to find data races in them using intel pin Now I found some inbuilt functions in Intel Pin like INS_IsMemoryRead and INS_IsMemoryWrite to determine if a instruction is memory read or write respectively Now I want to achive the same for lock acquire and lock release (only for C++ pthread_mutex) but I didn't find any such function So I disassembled the lock acquire statement and found a lock prefix and a cmpxchg statement So I decided to use lockPrefix function of Intel Pin to determine if the instruction has lock prefix and INS_Opcode function to check if xed value is cmpxchg and then check if the adress being written to has value 1 then we can say lock acquire is successful But I believe there is something simpler and also have doubts regarding correctness of my approach Replies: Re: How to analyse lock acquire and release using intel pin instrumentation closing the non fpga related question Replies: Re: How to analyse lock acquire and release using intel pin instrumentation upon checking, this is not a FPGA question.. Can you post your question to the right category in the below? https://community.intel.com/t5/Product-Support-Forums/ct-p/product-support-forums Thanks Replies: Re: How to analyse lock acquire and release using intel pin instrumentation Yes https://www.intel.com/content/www/us/en/developer/articles/tool/pin-a-dynamic-binary-instrumentation-tool.html Replies: Re: How to analyse lock acquire and release using intel pin instrumentation Is there any update? Replies: Re: How to analyse lock acquire and release using intel pin instrumentation You may refer to here https://www.intel.com/content/www/us/en/products/overview.html Is this related to FPGA product? Replies: Re: How to analyse lock acquire and release using intel pin instrumentation I am really sorry but I don't understand what you mean by "FPGA question" Replies: Re: How to analyse lock acquire and release using intel pin instrumentation Is this related to FPGA question?