How can I generate the PLL Intel® FPGA IP using a script or the command line interface? - How can I generate the PLL Intel® FPGA IP using a script or the command line interface? Description To generate the PLL Intel® FPGA IP from the command line interface, the ip-generate utility can be used. Resolution The following is a simple command line example of the PLL Intel FPGA IP generation using ip-generate : c:\altera\13.1\quartus\sopc_builder\bin>ip-generate --output-directory=<output directory>--file-set=<file set> --component-name=altera_pll --output-name=<desired instant name> --system-info=DEVICE_FAMILY="<Device family name>" --component-param=gui_reference_clock_frequency="<input reference clock >" --component-param=gui_output_clock_frequency0="<desired output clock frequency>" --component-param=gui_phase_shift0="<desired phase shift>" --component-param=gui_duty_cycle0="<desired duty cycle>" For more options on ip-generate, run ip-generate --help in command line. Custom Fields values: ['novalue'] Troubleshooting 1408189644 False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V GZ FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V E FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V SE FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']