Ethernet 10G MAC Removal Timing Failure when Compiled without IP License - Ethernet 10G MAC Removal Timing Failure when Compiled without IP License Description When users compile Ethernet 10G MAC without its IP license, timing analysis will fail with removal violation. The failing path is driven by "to-clock" of altera_reserved_tck. This issue affects Stratix IV devices in ACDS 12.0. Resolution There is no workaround for this issue. This issue is fixed in ACDS 12.1. Custom Fields values: ['novalue'] Troubleshooting novalue True ['Ethernet'] ['FPGA Dev Tools Quartus II Software'] 12.1 12.0 ['Stratix® IV FPGAs'] ['novalue'] ['novalue'] ['novalue']