How do I enable or disable the Advanced Error Detection (AER) for my Intel® Stratix®10 PCIe* Hard IP core? - How do I enable or disable the Advanced Error Detection (AER) for my Intel® Stratix®10 PCIe* Hard IP core? Description The AER function is enabled by default for all Intel® Stratix® 10 PCIe* Hard IP cores. The user cannot disable this function. Resolution This information has been added to all the Intel® Stratix® 10 PCIe* Hard IP user guides. Custom Fields values: ['novalue'] Troubleshooting 2205892329 False ['Avalon-MM Stratix® 10 Hard IP for PCI Express', 'Avalon-ST Stratix® 10 Hard IP for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 18.0 17.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']