Why does the TimeQuest timing analyzer ignore set_clock_groups constraints? - Why does the TimeQuest timing analyzer ignore set_clock_groups constraints? Description Due to an error in the Quartus® II software version 11.1 SP2 and earlier, the TimeQuest timing analyzer may ignoreset_clock_groups constraints if they are written with backslashes (""): set_clock_groups -asynchronous -group {clk_A} -group {clk_B} -group {clk_C} This may result in timing paths reported even though the paths have been cut using the set_clock_groupsconstraint. Resolution To work around this problem, delete the "\" and create the constraint in one line in your Synopsys Design Constraints file ( .sdc ). For example, modify the previous constraint as follows: set_clock_groups -asynchronous -group {clk_A} -group {clk_B} -group {clk_C} This error is scheduled to be fixed in a future release of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']