Which voltage supply is used for single ended clock input pins in Stratix V, Arria V, and Cyclone V devices? - Which voltage supply is used for single ended clock input pins in Stratix V, Arria V, and Cyclone V devices? Description When configured with a single ended I/O standard, the clock input pins in Stratix® V, Arria® V, and Cyclone® V devices are powered by the VCCIO supply of their respective I/O bank. Resolution Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Arria® V GT FPGA', 'Arria® V GX FPGA', 'Arria® V ST FPGA', 'Arria® V SX FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Cyclone® V ST FPGA', 'Cyclone® V SX FPGA', 'Stratix® V E FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']