Why do I see both compilation failures and functional problems when using multiple instantiations of the Interlaken (2nd Generation) Intel® FPGA IP core with different configurations in the Intel® Quartus® Prime Pro Edition Software? - Why do I see both compilation failures and functional problems when using multiple instantiations of the Interlaken (2nd Generation) Intel® FPGA IP core with different configurations in the Intel® Quartus® Prime Pro Edition Software? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 20.2 and earlier, instantiating different configurations of the Interlaken (2nd Generation) Intel® FPGA IP core in your design may encounter problems. The file uflex_ilk_dcore.sv is not unique to each configuration of the intellectual property (IP) and this can cause compilation and functional problems. Resolution To work around this problem in the Intel® Quartus® Prime Pro Edition Software version 20.2 and earlier, uniquify the file uflex_ilk_dcore.sv for each configuration of the Interlaken (2nd Generation) Intel® FPGA IP core to be used. This problem has been fixed starting with the Intel® Quartus® Prime Pro Edition Software version 20.3. Custom Fields values: ['novalue'] Errata 1508184055 False ['Interlaken (2nd Generation) IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.3 20.2 ['Agilex™ 7 FPGAs and SoCs', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']