Why do I get the following Internal Error message when compiling PCI Express design in Quartus® II software? - Why do I get the following Internal Error message when compiling PCI Express design in Quartus® II software? Description Due to a bug in the Quartus® II software, "Rapid recompile" can cause Internal Errors when compiling PCI Express Hard IP (under Settings --> Compilation Process Settings --> Incremental Compilation). Internal Error: Sub-system: HSSI, File: /quartus/periph/hssi/hssi_module.cpp, Line: 2393 Different number of RX (0) and TX (8) connected to HIP Stack Trace: 0xb5fbd: HSSI::hssi_legality_checker_are_coreclk_connections_valid 0x4b89d (periph_hssi) 0xb6271: HSSI::hssi_legality_checker_are_coreclk_connections_valid 0x4bb51 (periph_hssi) 0x53c23: FPP_VAR::as_hash 0x7e3 (periph_fpp) 0x53d8a: FPP_VAR::as_hash 0x94a (periph_fpp) 0x27e6a: FSV_LCELL_LEGALITY::hle_is_legal 0x3ada (fitter_fsv) 0x1307f: fsv_execute 0x312f (fitter_fsv) 0x195f3: fsv_execute 0x96a3 (fitter_fsv) 0x46762: FITCC_EXPERT::fitter_preparation 0x222 (FITTER_FITCC) 0x490b7: FITCC_EXPERT::invoke_fitter 0x437 (FITTER_FITCC) 0x101e3: fsv_execute 0x293 (fitter_fsv) 0xc063: fmain_start 0x823 (FITTER_FMAIN) 0x12718: QEXE_ARGS::get_command_line 0x1ca8 (comp_qexe) 0x15a7a: qexe_process_cmdline_arguments 0x5aa (comp_qexe) 0x15b91: qexe_standard_main 0xa1 (comp_qexe) 0x4d78: msg_exe_fini 0x58 (CCL_MSG) 0x55bc: msg_exe_fini 0x89c (CCL_MSG) 0x1a94: MEM_SEGMENT_INTERNAL::~MEM_SEGMENT_INTERNAL 0x1a4 (ccl_mem) 0x61ef: msg_exe_main 0x8f (CCL_MSG) 0x1652c: BaseThreadInitThunk 0xc (kernel32) 0x2c520: RtlUserThreadStart 0x20 (ntdll) End-trace Resolution To workaround this issue please disable the 'Rapid recompile' option. This problem will be fixed in a future version of the Quartus® II software. Custom Fields values: ['novalue'] Troubleshooting 91130 True ['Arria® V Hard IP for PCI Express IP'] ['FPGA Dev Tools Quartus II Software'] 23.1 12.1 ['Arria® V GX FPGA', 'Cyclone® V GX FPGA', 'Stratix® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']