Error: Fractional PLL parameter 'pll_slf_rst' is set to an illegal value of 'true' on node <node name> - Error: Fractional PLL parameter 'pll_slf_rst' is set to an illegal value of 'true' on node <node name> Description Due to a problem in the Quartus® II software versions 12.1 and earlier, you may see this error when compiling a design containing transceivers and using incremental compilation. Resolution To avoid this error apply the following assignment to your project: set_instance_assignment -name PLL_AUTO_RESET ON -to " <hierarchy> |altera_pll:altera_pll_i" This problem is scheduled to be fixed in a future release of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 10.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']