Why do I see ECC errors on the DCFIFO even when the data output is correct? - Why do I see ECC errors on the DCFIFO even when the data output is correct? Description When using the Intel® Quartus® Prime Software version 18.1 and earlier with Intel® Arria® 10 devices, you might see error correction code (ECC) errors on the DCFIFO in show ahead mode when the data output is correct. This is due to the ECC being incorrectly calculated before the data is stable. Resolution To work around this problem, ensure that the ECC error is only sampled when data output is valid or when the FIFO is not empty. This problem is fixed starting with the Intel® Quartus® Prime Pro/Standard Edition Software version 19.1 . Custom Fields values: ['novalue'] Troubleshooting 1506991953 False ['FIFO IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.1 18.1 ['Arria® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']