Reset Synchronization Problem - Reset Synchronization Problem Description The reset_rx_clk and reset_tx_clk signals do not synchronize to rx_clk and tx_clk . This issue affects variants of MAC function with 1000BASE-X/SGMII PCS and embedded PMA. Resolution No workaround.This issue is fixed in version 11.0 of the Triple-Speed Ethernet MegaCore function. Custom Fields values: ['novalue'] Troubleshooting novalue True ['Ethernet'] ['FPGA Dev Tools Quartus II Software'] 11.0 10.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']