Why do I see the AXI interface of High Bandwidth Memory (HBM2E) Interface Agilex™ 7 FPGAs M-Series IP be locked up? - Why do I see the AXI interface of High Bandwidth Memory (HBM2E) Interface Agilex™ 7 FPGAs M-Series IP be locked up? Description You may see the AXI interface of High Bandwidth Memory (HBM2E) Interface Agilex™ 7 FPGAs M-Series IP be locked up if you assert the hbm_reset_n signal when AXI traffic is running. Resolution Ensure the AXI interface is idle and all command queues are cleared before you assert the hbm_reset_n signal. Custom Fields values: ['novalue'] Troubleshooting 15017645954 False ['High Bandwidth Memory (HBM2E) Interface Agilex™ 7 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] novalue No plan to fix ['Agilex™ 7 FPGA M-Series'] ['novalue'] ['novalue'] ['novalue']